The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Oct. 18, 2017
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

En-Chiuan Liou, Tainan, TW;

Chih-Wei Yang, Kaohsiung, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Chun-Yuan Wu, Yun-Lin County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 21/762 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/283 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/283 (2013.01); H01L 21/3081 (2013.01); H01L 21/31144 (2013.01); H01L 21/76232 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a plurality of fin-shaped structures and a first shallow trench isolation (STI) around the fin-shaped structures on the first region and the second region; forming a patterned hard mask on the second region; removing the fin-shaped structures and the first STI from the first region; forming a second STI on the first region; removing the patterned hard mask; and forming a gate structure on the second STI.


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