The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2019
Filed:
Nov. 20, 2017
Applicant:
Nxp Usa, Inc., Austin, TX (US);
Inventors:
Alexandre Sansigolo Lujan, Campinas, BR;
Milton Hissasi Kataoka, Campinas, BR;
Rubens Takiguti, Campinas, BR;
Assignee:
NXP USA, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318541 (2013.01); G01R 31/318552 (2013.01);
Abstract
An integrated circuit includes clock suppression circuitry that can suppress the launch pulse of an at-speed test to prevent scan test data from propagating from an output of a scan latch through a multi-clock cycle combinational logic path to a downstream scan latch during the at-speed test. The integrated circuit can also suppress the capture pulse of an at-speed test to prevents scan test data that is propagated from an upstream scan latch through a multi-cycle combinational logic path from being latched at the downstream latch during the at-speed test.