The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Feb. 13, 2018
United Microelectronics Corp., Hsinchu, TW;
Shu-Hung Yu, Kaohsiung, TW;
Chun-Hung Cheng, Kaohsiung, TW;
Chuan-Fu Wang, Miaoli County, TW;
An-Hsiu Cheng, Pingtung County, TW;
Ping-Chia Shih, Tainan, TW;
Chi-Cheng Huang, Kaohsiung, TW;
Kuo-Lung Li, Yunlin County, TW;
Chia-Hui Huang, Tainan, TW;
Chih-Yao Wang, Taichung, TW;
Zi-Jun Liu, Kaohsiung, TW;
Chih-Hao Pan, Kaohsiung, TW;
United Microelectronics Corp., Hsinchu, TW;
Abstract
A semiconductor memory device includes a substrate, having a plurality of cell regions, wherein the cell regions are parallel and extending along a first direction. A plurality of STI structures is disposed in the substrate, extending along the first direction to isolate the cell regions, wherein the STI structures have a uniform height lower than the substrate in the cell regions. A selection gate line is extending along a second direction and crossing over the cell regions and the STI structures. A control gate line is adjacent to the selection gate line in parallel extending along the second direction and also crosses over the cell regions and the STI structures. The selection gate line and the control gate line together form a two-transistor (2T) memory cell.