The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

Jan. 02, 2018
Applicant:

Advanced Semiconductor Engineering, Inc., Kaosiung, TW;

Inventors:

Chung-Hsin Chiang, Kaohsiung, TW;

Kuang-Ting Chi, Kaohsiung, TW;

Ming-Hsiang Cheng, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 23/552 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 23/31 (2013.01); H01L 23/3121 (2013.01); H01L 23/552 (2013.01); H01L 2223/6616 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/15313 (2013.01); H01L 2924/1815 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19105 (2013.01);
Abstract

The present disclosure provides a semiconductor package device comprising: (1) a substrate comprising a first area and a second area; (2) a semiconductor device on the first area of the substrate; (3) an antenna pattern on the second area of the substrate; (4) a first electronic component on the antenna pattern; and (5) a first package body encapsulating the first area of the substrate and the semiconductor device and exposing the antenna pattern, the first electronic component and the second area of the substrate. An upper surface of the first package body is non-coplanar with the antenna pattern on the second area of the substrate.


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