The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

May. 23, 2017
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Chien-Liang Lin, San Jose, CA (US);

Chung-Wah Norris Ip, Cupertino, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/36 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3664 (2013.01); G06F 11/364 (2013.01); G06F 17/504 (2013.01); G06F 17/5045 (2013.01);
Abstract

The present disclosure relates to a method for reusing a debugging workspace in an electronic design environment. Embodiments may include performing, using a processor, a verification of an electronic design and identifying at least one triggered property associated with the electronic design. Embodiments may further include identifying at least one fan-in signal associated with the at least one triggered property of the electronic design. Embodiments may also include determining a start point debug location based upon, at least in part, the at least one fan-in signal, wherein the start point debug location includes at least one of signal information, cycle information, and event time information. Embodiments may further include generating a debug workspace, wherein generating includes adding at least one additional debug location and storing a cycle of the additional debug location as a relative cycle that is relative to another debug location associated with the debug workspace.


Find Patent Forward Citations

Lin, Chien-Liang. (2019). System, method, and computer program product for capture and reuse in a debug workspace (U.S. Patent No. 10331547). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10331547

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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