The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2019
Filed:
Jun. 30, 2017
Cadence Design Systems, Inc., San Jose, CA (US);
Vivek Chickermane, Slaterville Springs, NY (US);
Christos Papameletis, Binghamton, NY (US);
Krishna Vijaya Chakravadhanula, Vestal, NY (US);
Brian Edward Foutz, Charlottesville, VA (US);
CADENCE DESIGN SYSTEMS, INC., San Jose, CA (US);
Abstract
Systems disclosed herein provide for efficient top-level compactors for systems on a chip (SoCs) with multiple identical cores. Embodiments of the systems provide for compactors with a time-skewed assignment configuration, compactors with a space-skewed assignment configuration, compactors with time/space-skewed assignment configuration, and compactors that can selectively switch between the time/space-skewed assignment configuration and a symmetric assignment configuration.