The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Dec. 14, 2016
Cadence Designs Systems, Inc., San Jose, CA (US);
Sameer Chakravarthy Chillarige, Greater Noida, IN;
Sonam Kathpalia, Noida, IN;
Mehakpreet Kaur, Amritsar, IN;
James S. Allen, Candor, NY (US);
Krishna Vijaya Chakravadhanula, Vestal, NY (US);
CADENCE DESIGN SYSTEMS, INC., San Jose, CA (US);
Abstract
An integrated circuit test method provides an interactive shell environment having analysis modules organized as a directory such that for a given session a user can access any of the analysis modules. This invention describes a virtual directory structure for navigating through the entire test data starting from design, test configuration, ATPG patterns, failure information and callout information. This structure also allows the creation of a scripting environment for the user to select a specific configuration and process the information. User can achieve all of this in a single session as opposed to working on every test configuration in an independent session.