The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Dec. 16, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Patrick P. Lai, Fremont, CA (US);

Tyler N. Sondag, Santa Clara, CA (US);

Sebastian Winkel, Los Altos, CA (US);

Polychronis Xekalakis, San Jose, CA (US);

Ethan Schuchman, Santa Clara, CA (US);

Jayesh Iyer, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3017 (2013.01); G06F 9/30 (2013.01); G06F 9/3016 (2013.01); G06F 9/30196 (2013.01);
Abstract

Methods and apparatuses relating to a fusion manager to fuse instructions are described. In one embodiment, a hardware processor includes a hardware binary translator to translate an instruction stream into a translated instruction stream, a hardware fusion manager to fuse multiple instructions of the translated instruction stream into a single fused instruction, a hardware decode unit to decode the single fused instruction into a decoded, single fused instruction, and a hardware execution unit to execute the decoded, single fused instruction.


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