The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Sep. 15, 2017
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

Yaojian Lin, Jiangyin, CN;

Kang Chen, Singapore, SG;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/10 (2006.01); H01L 23/552 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/56 (2013.01); H01L 23/3121 (2013.01); H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 23/49816 (2013.01); H01L 23/49833 (2013.01); H01L 23/5389 (2013.01); H01L 23/552 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 25/105 (2013.01); H01L 21/568 (2013.01); H01L 22/12 (2013.01); H01L 22/14 (2013.01); H01L 22/20 (2013.01); H01L 23/3192 (2013.01); H01L 23/49822 (2013.01); H01L 23/5383 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 2224/03 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03464 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/0558 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05611 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/1132 (2013.01); H01L 2224/1134 (2013.01); H01L 2224/1145 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11464 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/11901 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13113 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/19 (2013.01); H01L 2224/24227 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29298 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/83 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/94 (2013.01); H01L 2224/97 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/141 (2013.01); H01L 2924/143 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/14335 (2013.01); H01L 2924/153 (2013.01); H01L 2924/157 (2013.01); H01L 2924/1533 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15321 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/19107 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor device has a first build-up interconnect structure formed over a substrate. The first build-up interconnect structure includes an insulating layer and conductive layer formed over the insulating layer. A vertical interconnect structure and semiconductor die are disposed over the first build-up interconnect structure. The semiconductor die, first build-up interconnect structure, and substrate are disposed over a carrier. An encapsulant is deposited over the semiconductor die, first build-up interconnect structure, and substrate. A second build-up interconnect structure is formed over the encapsulant. The second build-up interconnect structure electrically connects to the first build-up interconnect structure through the vertical interconnect structure. The substrate provides structural support and prevents warpage during formation of the first and second build-up interconnect structures. The substrate is removed after forming the second build-up interconnect structure. A portion of the insulating layer is removed exposing the conductive layer for electrical interconnect with subsequently stacked semiconductor devices.


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