The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2019
Filed:
Nov. 28, 2017
International Business Machines Corporation, Armonk, NY (US);
John C. Arnold, Valatie, NY (US);
Robert L. Bruce, White Plains, NY (US);
Sebastian U. Engelmann, White Plains, NY (US);
Nathan P. Marchack, New York, NY (US);
Hiroyuki Miyazoe, White Plains, NY (US);
Jeffrey C. Shearer, Albany, NY (US);
Takefumi Suzuki, Tokyo, JP;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of forming field effect transistor (FET) circuits, and forming Integrated Circuit (IC) chips with the FET circuits. After forming gate sidewall spacers, filling with insulation and planarizing to the top of the sidewall spacers, self-aligned source/drain contacts are etched through the insulation and said gate dielectric layer to source/drain regions. A combination fluoroether/hydrofluoroether-hydrofluorocarbon (*FE-HFC) plasma etch etches the source/drain contacts self-aligned. The self-aligned contacts are filled with conductive material, and FETs are wired together into circuits, connecting to FETs through the self-aligned contacts.