The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2019
Filed:
Dec. 22, 2016
Applicant:
Xcelsis Corporation, San Jose, CA (US);
Inventors:
Javier A. Delacruz, San Jose, CA (US);
William C. Plants, Campbell, CA (US);
Assignee:
Xcelsis Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2856 (2013.01); G01R 31/2884 (2013.01); G01R 31/2894 (2013.01); G01R 31/2831 (2013.01);
Abstract
The invention pertains to in-wafer testing of integrated circuits. In particular, it pertains to apparatuses and methods for testing small integrated circuits that have pad sizes and pitches that are too small for using conventional wafer probing technology.
Quick Actions:
Delacruz, Javier. (2019). Wafer testing without direct probing (U.S. Patent No. 10295588). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10295588
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile