The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Jul. 28, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

James M. Holland, Folsom, CA (US);

Srinivasan Embar Raghukrishnan, Folsom, CA (US);

Lidong Xu, Beijing, CN;

Fangwen Fu, Folsom, CA (US);

Dmitry E. Ryzhov, Mountain View, CA (US);

Satya N. Yedidi, Roseville, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 7/12 (2006.01); H04N 11/02 (2006.01); H04N 11/04 (2006.01); H04N 19/43 (2014.01); H04N 19/53 (2014.01); H04N 19/567 (2014.01); H04N 19/115 (2014.01); H04N 19/61 (2014.01); H04N 19/126 (2014.01); H04N 19/96 (2014.01); H04N 19/192 (2014.01); H04N 19/557 (2014.01); H04N 19/625 (2014.01);
U.S. Cl.
CPC ...
H04N 19/43 (2014.11); H04N 19/115 (2014.11); H04N 19/126 (2014.11); H04N 19/192 (2014.11); H04N 19/53 (2014.11); H04N 19/557 (2014.11); H04N 19/567 (2014.11); H04N 19/61 (2014.11); H04N 19/96 (2014.11); H04N 19/625 (2014.11);
Abstract

An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder includes a fixed function hierarchical motion estimation search unit, fixed function integer motion estimation search units, and a fixed function check and refinement unit. The check and refinement unit is to generate residuals using nested loops based on at least one spatial domain prediction and at least one frequency domain prediction and perform a final mode decision based on rate distortion optimization (RDO) costs associated with the generated residuals. The hardware bit packing unit is to pack bits as coded according to the final mode decision into a data format.


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