The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2019
Filed:
Jan. 09, 2018
Applicants:
United Microelectronics Corp., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Inventors:
Assignees:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/302 (2006.01); H01L 21/321 (2006.01); H01L 21/768 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02304 (2013.01); H01L 21/02074 (2013.01); H01L 21/02186 (2013.01); H01L 21/302 (2013.01); H01L 21/30625 (2013.01); H01L 21/3212 (2013.01); H01L 21/32115 (2013.01); H01L 21/7684 (2013.01);
Abstract
A method for improving wafer surface uniformity is disclosed. A wafer including a first region and a second region is provided. The first region and the second region have different pattern densities. A conductive layer is formed on the wafer. A buffer layer is then formed on the conductive layer. The buffer layer is polished until the conductive layer is exposed. A portion of the conductive layer and the remaining buffer layer are etched away.