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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10269694 B1

PDFFull Text
Date of Patent:
Apr. 23, 2019

Filed:

Jul. 16, 2015

Apparatus and method for chip placement and molding

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jui Hsieh Lai, Taoyuan, TW;

Ying-Hao Kuo, Hsinchu, TW;

Kuo-Chung Yee, Taoyuan, TW;

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Marcos D Pizarro

Assistant Examiner:

Antonio Crite

Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/31 (2006.01); H05K 1/02 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H05K 1/18 (2006.01); H01L 25/00 (2006.01); H01L 23/538 (2006.01); B29C 39/26 (2006.01); B29C 39/10 (2006.01); B29L 9/00 (2006.01); B29L 31/34 (2006.01); B29K 105/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); B29C 39/10 (2013.01); B29C 39/26 (2013.01); H01L 21/565 (2013.01); H01L 21/566 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 23/49805 (2013.01); H01L 23/49811 (2013.01); H01L 23/49816 (2013.01); H01L 23/5389 (2013.01); H01L 24/11 (2013.01); H01L 24/14 (2013.01); H01L 24/19 (2013.01); H01L 24/96 (2013.01); H01L 25/50 (2013.01); H05K 1/0284 (2013.01); H05K 1/183 (2013.01); B29K 2105/0097 (2013.01); B29L 2009/005 (2013.01); B29L 2031/34 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/29194 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73267 (2013.01); H01L 2924/157 (2013.01); H01L 2924/1579 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/15159 (2013.01); H01L 2924/15788 (2013.01); H01L 2924/181 (2013.01); H01L 2924/1815 (2013.01);
Abstract

An apparatus includes a base portion having an upper surface and a lower surface opposite the upper surface. The apparatus also includes a first sidewall portion having a first upper portion distal the upper surface of the base portion and a first slanted sidewall between the first upper portion and the upper surface of the base portion. The apparatus further includes a second sidewall portion having a second upper portion distal the upper surface of the base portion and a second slanted sidewall between the second upper portion and the upper surface of the base portion. The first sidewall portion and the second sidewall portion define a first reservoir between the first slanted sidewall and the second slanted sidewall, the first reservoir being configured to receive a first chip package portion and to secure the first chip package portion in a first curing position.

Find Patent Forward Citations

Lai, Jui. (2019). Apparatus and method for chip placement and molding (U.S. Patent No. 10269694). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10269694

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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