The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2019

Filed:

Dec. 14, 2016
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Yuqing Gong, San Jose, CA (US);

Henley Liu, San Jose, CA (US);

Myongseob Kim, Pleasanton, CA (US);

Suresh P. Parameswaran, Fremont, CA (US);

Cheang-Whang Chang, Mountain View, CA (US);

Boon Y. Ang, Sunnyvale, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 22/34 (2013.01); H01L 22/12 (2013.01); H01L 24/09 (2013.01);
Abstract

A circuit for testing bond connections between a first die and a second die is described. The circuit comprises a defect monitoring circuit implemented on the first die, which is configured as a test die; and a plurality of bond connections between the first die and the second die; wherein the defect monitoring circuit is configured to detect a defect in a bond connection of the plurality of bond connections between the first die and the second die. A method of testing bond connections between a first die and a second die is also described.


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