The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Sep. 21, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Sandeep Kumar Goel, Dublin, CA (US);

Ji-Jan Chen, Kaohsiung, TW;

Stanley John, Fremont, CA (US);

Yun-Han Lee, Baoshan Township, TW;

Yen-Hao Huang, Hsin-chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/07 (2006.01); G06F 1/08 (2006.01); H03L 7/23 (2006.01); H03L 7/091 (2006.01); H03L 7/095 (2006.01); H03K 19/21 (2006.01);
U.S. Cl.
CPC ...
H03L 7/23 (2013.01); H03L 7/091 (2013.01); H03L 7/095 (2013.01); H03K 19/21 (2013.01);
Abstract

A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.


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