The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2019
Filed:
Dec. 20, 2017
Globalfoundries Inc., Grand Cayman, KY;
Dina H. Triyoso, Mechanicville, NY (US);
Timothy J. McArdle, Ballston Lake, NY (US);
Judson R. Holt, Ballston Lake, NY (US);
Amy L. Child, Wilton, NY (US);
George R. Mulfinger, Gansevoort, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
A pFET includes a semiconductor-on-insulator (SOI) substrate; and a trench isolation within the SOI substrate, the trench isolation including a raised portion extending above an upper surface of the SOI substrate. A compressive channel silicon germanium (cSiGe) layer is over the SOI substrate. A strain retention member is positioned between at least a portion of the raised portion of the trench isolation and the compressive cSiGe layer. A gate and source/drain regions are positioned over the compressive cSiGe layer.