Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines

Abstract

When forming sophisticated semiconductor devices requiring resistors based on polysilicon material having non-silicided portions, the respective cap material for defining the silicided portions may be omitted during the process sequence, for instance, by using a patterned liner material or by applying a process strategy for removing the metal material from resistor areas that may not receive a corresponding metal silicide. By implementing the corresponding process strategies, semiconductor devices may be obtained with reduced probability of contact failures, with superior performance due to relaxing surface topography upon forming the contact level, and/or with increased robustness with respect to contact punch-through.