The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2019

Filed:

Aug. 24, 2018
Applicant:

Avalanche Technology, Inc., Fremont, CA (US);

Inventors:

Hongxin Yang, Newark, CA (US);

Dong Ha Jung, Pleasanton, CA (US);

Jing Zhang, Los Altos, CA (US);

Bing K. Yen, Cupertino, CA (US);

Assignee:

Avalanche Technology, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/12 (2006.01); G11C 11/16 (2006.01); H01L 27/22 (2006.01); H01L 43/08 (2006.01);
U.S. Cl.
CPC ...
H01L 43/12 (2013.01); G11C 11/161 (2013.01); H01L 27/224 (2013.01); H01L 43/08 (2013.01);
Abstract

The present invention is directed to a method for manufacturing a memory cell that includes a magnetic memory element electrically connected to a two-terminal selector. The method includes the steps of depositing a selector film stack on a substrate; depositing a magnetic memory element film stack on top of the selector film stack; etching the magnetic memory element film stack with an etch mask formed thereon to remove at least an insulating tunnel junction layer in the magnetic memory element film stack not covered by the etch mask, thereby forming a magnetic memory element pillar; depositing a first conforming dielectric layer over the magnetic memory element pillar, including a sidewall thereof, and surrounding surface; etching a portion of the first conforming dielectric layer covering the surrounding surface to form a first protective sleeve around at least the insulating tunnel junction layer of the magnetic memory element pillar; and etching the selector film stack using the etch mask and the first protective sleeve as a composite mask to form a memory cell pillar.


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