The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2019

Filed:

Jul. 07, 2014
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Thorsten Meyer, Regensburg, DE;

Gerald Ofner, Regensburg, DE;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/60 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01); H01L 21/54 (2006.01); H01L 25/00 (2006.01); H05K 1/11 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/54 (2013.01); H01L 23/3142 (2013.01); H01L 23/3178 (2013.01); H01L 23/49811 (2013.01); H01L 25/065 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 23/3135 (2013.01); H01L 23/49838 (2013.01); H01L 23/5384 (2013.01); H01L 24/16 (2013.01); H01L 24/97 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/131 (2013.01); H01L 2224/133 (2013.01); H01L 2224/1329 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/92125 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06558 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/1533 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15313 (2013.01); H01L 2924/15321 (2013.01); H01L 2924/15331 (2013.01); H05K 1/11 (2013.01); H05K 2201/10515 (2013.01);
Abstract

A package-on-package stacked microelectronic structure comprising a pair of microelectronic packages attached to one another in a flipped configuration. In one embodiment, the package-on-package stacked microelectronic structure may comprise a first and a second microelectronic package, each comprising a substrate having at least one package connection bond pad formed on a first surface of each microelectronic package substrate, and each having at least one microelectronic device electrically connected to the each microelectronic package substrate first surface, wherein the first and the second microelectronic package are connected to one another with at least one package-to-package interconnection structure extending between the first microelectronic package connection bond pad and the second microelectronic package connection bond pad.


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