The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

May. 04, 2017
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Oliver Hellmund, Neubiberg, DE;

Peter Irsigler, Obernberg/Inn, AT;

Sebastian Schmidt, Munich, DE;

Hans-Joachim Schulze, Taufkirchen, DE;

Martina Seider-Schmidt, Munich, DE;

Assignee:

INFINEON TECHNOLOGIES AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/306 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01); H01L 21/304 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/30604 (2013.01); H01L 21/76895 (2013.01); H01L 23/528 (2013.01); H01L 29/0657 (2013.01); H01L 29/0865 (2013.01); H01L 29/41741 (2013.01); H01L 29/66674 (2013.01); H01L 29/66734 (2013.01); H01L 29/7801 (2013.01); H01L 29/7813 (2013.01); H01L 21/304 (2013.01); H01L 21/30625 (2013.01);
Abstract

A semiconductor device includes a power transistor in a semiconductor substrate portion, where the semiconductor substrate portion includes a central portion and a kerf, components of the power transistor are arranged in the central portion, and the central portion has a thickness d. The semiconductor device also includes a support element disposed over a main surface of the central portion, where the support element has a smallest lateral extension t at a side adjacent to the main surface of the semiconductor substrate portion and a height h, where 0.1×h≤d≤4×h and 0.1×h≤t≤1.5×h.


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