The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Jul. 07, 2016
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Boon Teik Chan, Leuven, BE;

Safak Sayan, Tervuren, BE;

Min-Soo Kim, Leuven, BE;

Doni Parnell, Leuven, BE;

Roel Gronheid, St. Agatha Rode, BE;

Assignee:

IMEC VZW, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 21/762 (2006.01); H01L 21/027 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/3065 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1037 (2013.01); H01L 21/0273 (2013.01); H01L 21/3065 (2013.01); H01L 21/3081 (2013.01); H01L 21/3085 (2013.01); H01L 21/3086 (2013.01); H01L 21/3088 (2013.01); H01L 21/31116 (2013.01); H01L 21/31122 (2013.01); H01L 21/31138 (2013.01); H01L 21/76224 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01);
Abstract

A method for producing fin structures, using Directed Self Assembly (DSA) lithographic patterning, in an area of a semiconductor substrate includes providing a semiconductor substrate covered with a shallow trench isolation (STI) layer stack on a side thereof; defining a fin area on that side of the substrate by performing a lithographic patterning step other than DSA, wherein the fin structures will be produced in the fin area; and producing the fin structures in the semiconductor substrate within the fin area according to a predetermined fin pattern using DSA lithographic patterning. The disclosure also relates to associated semiconductor structures.


Find Patent Forward Citations

Loading…