The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Feb. 10, 2014
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Petteri Palm, Regensburg, DE;

Alexander Heinrich, Bad Abbach, DE;

Holger Torwesten, Regensburg, DE;

Tobias Simbeck, Regensburg, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 21/4832 (2013.01); H01L 21/78 (2013.01); H01L 23/49513 (2013.01); H01L 23/49541 (2013.01); H01L 23/49562 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 24/73 (2013.01); H01L 24/82 (2013.01); H01L 24/92 (2013.01); H01L 24/97 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/562 (2013.01); H01L 24/05 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 2224/04026 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05082 (2013.01); H01L 2224/05083 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/24246 (2013.01); H01L 2224/27831 (2013.01); H01L 2224/291 (2013.01); H01L 2224/2918 (2013.01); H01L 2224/2926 (2013.01); H01L 2224/29109 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/29393 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/82031 (2013.01); H01L 2224/82039 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/8382 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/83203 (2013.01); H01L 2224/83447 (2013.01); H01L 2224/83455 (2013.01); H01L 2224/83801 (2013.01); H01L 2224/83825 (2013.01); H01L 2224/83931 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/97 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01); H01L 2924/2064 (2013.01); H01L 2924/20641 (2013.01); H01L 2924/20642 (2013.01); H01L 2924/20644 (2013.01);
Abstract

A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. The electrically insulating material is divided along the surface regions devoid of the metal foil and the metal layer to form individual modules.


Find Patent Forward Citations

Loading…