The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Oct. 21, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bu Qi Cheng, San Jose, CA (US);

Wei-Yu Chen, Santa Clara, CA (US);

Guei-Yuan Lueh, San Jose, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2018.01); G06F 8/41 (2018.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06T 1/20 (2006.01);
U.S. Cl.
CPC ...
G06F 8/41 (2013.01); G06F 8/433 (2013.01); G06F 9/30145 (2013.01); G06F 9/3838 (2013.01); G06F 9/3851 (2013.01); G06T 1/20 (2013.01);
Abstract

Methods and apparatus relating to techniques for compiler-based instruction scoreboarding. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to remove unnecessary dependence edges from a data dependency graph, partition the data dependency graph into a plurality of sub-graphs, determine a live range for each of the plurality of sub-graphs, and assign a scoreboard entry to each of the plurality of sub-graphs, wherein sub-graphs which have interfering live ranges are assigned different scoreboard entries. Other embodiments are also disclosed and claimed.


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