The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2019

Filed:

Jun. 13, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Paul S. Diefenbaugh, Portland, OR (US);

Robert E. Gough, Sherwood, OR (US);

Yuval Bachrach, Haifa, IL;

Mikal C. Hunsaker, El Dorado Hills, CA (US);

Rafi Ben-Tal, Yokneam, IL;

Ilan Pardo, Ramat-Hasharon, IL;

Gideon Prat, Haifa, IL;

David J. Harriman, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 1/325 (2013.01); G06F 1/3206 (2013.01); G06F 1/3234 (2013.01); G06F 1/3278 (2013.01); G06F 1/3287 (2013.01); Y02D 10/157 (2018.01); Y02D 10/171 (2018.01);
Abstract

A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.


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