The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

Feb. 28, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Pouya Hashemi, White Plains, NY (US);

Alexander Reznicek, Troy, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 21/225 (2006.01); H01L 21/283 (2006.01); H01L 27/088 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/84 (2006.01); H01L 29/16 (2006.01); H01L 29/161 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1211 (2013.01); H01L 21/02236 (2013.01); H01L 21/2253 (2013.01); H01L 21/2254 (2013.01); H01L 21/283 (2013.01); H01L 21/845 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/0638 (2013.01); H01L 29/0649 (2013.01); H01L 29/0657 (2013.01); H01L 29/161 (2013.01); H01L 29/1608 (2013.01); H01L 29/66795 (2013.01); H01L 29/66818 (2013.01); H01L 29/785 (2013.01); H01L 21/02238 (2013.01); H01L 21/02255 (2013.01);
Abstract

A method for manufacturing a semiconductor device comprises forming a first diffusion stop layer on a bulk semiconductor substrate, forming a doped semiconductor layer on the first diffusion stop layer, forming a second diffusion stop layer on the doped semiconductor layer, forming a fin layer on the doped semiconductor layer, patterning the first and second diffusion stop layers, the doped semiconductor layer, the fin layer and a portion of the bulk substrate, oxidizing the doped semiconductor layer to form an oxide layer, and forming a dielectric on the bulk substrate adjacent the patterned portion of the bulk substrate, the patterned first diffusion stop layer and the oxide layer.


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