The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Nov. 17, 2016
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Feng Wei Kuo, Hsinchu County, TW;

Chewn-Pu Jou, Hsinchu, TW;

Lan-Chou Cho, Hsinchu, TW;

Huan-Neng Chen, Taichung, TW;

Robert Bogdan Staszewski, Hsinchu, TW;

Seyednaser Pourmousavian, Dublin, IE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 1/00 (2006.01); H03L 7/099 (2006.01); H03K 5/151 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 1/00 (2013.01); H03K 5/1515 (2013.01); H03L 7/091 (2013.01); H03L 7/0992 (2013.01); H03L 7/0995 (2013.01); H03L 2207/50 (2013.01);
Abstract

An ADPLL circuit includes a time-to-digital converter (TDC) configured to generate a signal indicative of a phase difference between a first signal and a reference signal and a doubler electrically coupled to the TDC. The doubler is configured to receive a first voltage signal and generate a second voltage signal. The second voltage signal is provided to a voltage input of the TDC. The TDC is configured to generate one or more control signals for the doubler to adjust the second voltage signal.


Find Patent Forward Citations

Loading…