The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

May. 26, 2016
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ku-Feng Lin, New Taipei, TW;

Hung-Chang Yu, Hsin-Chu, TW;

Kai-Chun Lin, Hsinchu, TW;

Yu-Der Chih, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 25/18 (2006.01); H01L 27/088 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2463 (2013.01); H01L 23/481 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 25/18 (2013.01); H01L 27/088 (2013.01); H01L 27/2409 (2013.01); H01L 27/2436 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); H01L 45/1641 (2013.01); H01L 45/1683 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53257 (2013.01); H01L 45/04 (2013.01); H01L 45/16 (2013.01);
Abstract

A method of fabricating a resistive memory array includes forming a plurality of insulators and a conductive structure on a first substrate, performing a resistor-forming process to transform the insulators into a plurality of resistors, polishing the conductive structure to expose a plurality of contact points respectively electrically connected to the resistors, providing a second substrate having a plurality of transistors and a plurality of interconnect pads, bonding respectively the interconnect pads and the contact points, and removing the first substrate from the resistors and the conductive structure.


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Lin, Ku-Feng. (2018). Resistive memory array and fabricating method thereof (U.S. Patent No. 10163980). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10163980

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