The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2018
Filed:
Aug. 23, 2017
Win Semiconductors Corp., Tao Yuan, TW;
Chang-Hwang Hua, Tao Yuan, TW;
Wen Chu, Tao Yuan, TW;
WIN SEMICONDUCTORS CORP., Tao Yuan, TW;
Abstract
An improved structure for reducing compound semiconductor wafer distortion comprises a contact metal layer, at least one stress balance layer and a die attachment layer. The contact metal layer is formed on a bottom surface of a compound semiconductor wafer; the at least one stress balance layer is formed on a bottom surface of the contact metal layer, wherein the at least one stress balance layer is made of at least one conductive material; the die attachment layer is formed on a bottom surface of the at least one stress balance layer, wherein the die attachment layer is made of conductive material. By locating the at least one stress balance layer between the contact metal layer and the die attachment layer, the stress suffered by the compound semiconductor wafer is balanced so that the distortion of the compound semiconductor wafer is reduced.