The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2018

Filed:

Jun. 27, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kinyip Phoa, Beaverton, OR (US);

Nidhi Nidhi, Hillsboro, OR (US);

Chia-Hong Jan, Portland, OR (US);

Walid M. Hafez, Portland, OR (US);

Yi Wei Chen, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/044 (2014.01); H01L 31/0224 (2006.01); H01L 31/056 (2014.01); H01L 31/047 (2014.01); H02S 40/38 (2014.01); H01L 31/028 (2006.01); H01L 31/05 (2014.01); H01L 31/068 (2012.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/022458 (2013.01); H01L 31/028 (2013.01); H01L 31/022475 (2013.01); H01L 31/047 (2014.12); H01L 31/056 (2014.12); H01L 31/0516 (2013.01); H01L 31/068 (2013.01); H01L 31/0682 (2013.01); H01L 31/1884 (2013.01); H02S 40/38 (2014.12); Y02E 10/52 (2013.01); Y02E 10/547 (2013.01);
Abstract

An embodiment includes an apparatus comprising: a first photovoltaic cell; a first through silicon via (TSV) included in the first photovoltaic cell and passing through at least a portion of a doped silicon substrate, the first TSV comprising (a)(i) a first sidewall, which is doped oppositely to the doped silicon substrate, and (a)(ii) a first contact substantially filling the first TSV; and a second TSV included in the first photovoltaic cell and passing through at least another portion of the doped silicon substrate, the second TSV comprising (b)(i) a second sidewall, which comprises the doped silicon substrate, and (b)(ii) a second contact substantially filling the second TSV; wherein the first and second contacts each include a conductive material that is substantially transparent. Other embodiments are described herein.


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