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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10158014 B1

PDFFull Text
Date of Patent:
Dec. 18, 2018

Filed:

Apr. 03, 2017

Mos devices with ultra-high dielectric constants and methods of forming the same

Applicants:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

National Taiwan University, Taipei, TW;

Inventors:

Ming-Han Liao, Hsinchu, TW;

Minghwei Hong, Zhubei, TW;

Assignees:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

National Taiwan University, Taipei, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Julio J Maldonado

Assistant Examiner:

Andre' C Stevenson

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/51 (2006.01); C23C 14/16 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/165 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78391 (2014.09); C23C 14/165 (2013.01); H01L 21/28194 (2013.01); H01L 27/088 (2013.01); H01L 29/165 (2013.01); H01L 29/401 (2013.01); H01L 29/4966 (2013.01); H01L 29/516 (2013.01); H01L 29/517 (2013.01); H01L 29/6659 (2013.01); H01L 29/66545 (2013.01); H01L 29/7834 (2013.01); H01L 29/7848 (2013.01);
Abstract

An integrated circuit structure includes a semiconductor substrate, and a gate stack over the semiconductor substrate. The gate stack includes a high-k gate dielectric over the semiconductor substrate, and a magnetic compound over and in contact with the high-k gate dielectric. A source region and a drain region are on opposite sides of the gate stack. The gate stack, the source region, and the drain region are portions of a Metal-Oxide-Semiconductor (MOS) device.

Find Patent Forward Citations

Liao, Ming-Han. (2018). Mos devices with ultra-high dielectric constants and methods of forming the same (U.S. Patent No. 10158014). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10158014

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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