The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2018

Filed:

Apr. 10, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Victor Chiang Liang, Hsinchu, TW;

Chi-Feng Huang, Hsinchu County, TW;

Chia-Chung Chen, Keelung, TW;

Chun-Pei Wu, Nantou County, TW;

Fu-Huan Tsai, Kaohsiung, TW;

Chung-Hao Chu Chu, Hsinchu, TW;

Chin-Nan Chang, Tainan, TW;

Ching-Yu Yang, Taichung, TW;

Ankush Chaudhary, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 27/088 (2006.01); H01L 21/265 (2006.01); H01L 21/8234 (2006.01); H01L 21/266 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/0223 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/823418 (2013.01); H01L 21/823462 (2013.01); H01L 29/0847 (2013.01); H01L 29/1095 (2013.01); H01L 29/7833 (2013.01);
Abstract

Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.


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