The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2018

Filed:

Jan. 19, 2018
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Tsung-Han Ko, Hsin-Chu, TW;

Ching-Yu Chang, Hsin-Chu, TW;

Kuan-Hsin Lo, Nantou County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/027 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); G03F 7/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0271 (2013.01); G03F 7/0002 (2013.01); H01L 21/02118 (2013.01); H01L 21/02315 (2013.01); H01L 21/02318 (2013.01); H01L 21/02356 (2013.01); H01L 21/31138 (2013.01); B81C 2201/0149 (2013.01);
Abstract

Disclosed is a method of forming a semiconductor device using a self-assembly (DSA) patterning process. The method includes forming a patterned feature over a substrate; applying an orientation material that includes a first polymer and a second polymer over the substrate, wherein the first polymer has a first activation energy and the second polymer has a second activation energy; baking the substrate at first temperature thereby forming a first orientation layer that includes the first polymer; baking the substrate at second temperature thereby forming a second orientation layer that includes the second polymer; and performing a directed self-assembly (DSA) process over the first and the second orientation layers.


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