The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Apr. 26, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chun Hua Chang, Zhubei, TW;

Der-Chyang Yeh, Hsinchu, TW;

Kuang-Wei Cheng, Hsinchu, TW;

Yuan-Hung Liu, Hsinchu, TW;

Shang-Yun Hou, Jubei, TW;

Wen-Chih Chiou, Miaoli, TW;

Shin-Puu Jeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 49/02 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 28/60 (2013.01); H01L 21/76832 (2013.01); H01L 21/76846 (2013.01); H01L 21/76877 (2013.01); H01L 23/5223 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53228 (2013.01); H01L 23/53295 (2013.01);
Abstract

A method of forming a device includes forming a through via extending into a substrate. The method further includes forming a first insulating layer over the surface of the substrate. The method further includes forming a first metallization layer in the first insulating layer and electrically connected to the through via. The method further includes forming a capacitor over the first metallization layer, wherein the capacitor comprises a first capacitor dielectric layer and a second capacitor dielectric layer. The method further includes depositing a continuous second insulating layer over the first insulating layer. The capacitor is within the second insulating layer. The method further includes depositing a third insulating layer over the second insulating layer. The method further includes forming a second metallization layer in the third insulating layer. A bottom surface of the second metallization layer is below a bottom surface of the third insulating layer.


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