The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Feb. 02, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Meng-Sheng Chang, Hsinchu County, TW;

Bai-Mei Chang, Hsinchu County, TW;

Shao-Yu Chou, Hsinchu County, TW;

Liang Chuan Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/528 (2006.01); H01L 27/112 (2006.01); H01L 21/8234 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11206 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); H01L 21/823475 (2013.01);
Abstract

A non-volatile memory having a double metal layout is provided that includes a first fuse fabricated on a first conductive layer of the integrated circuit, a second fuse fabricated on a second conductive layer of the integrated circuit, and a transistor fabricated on front-end-of-the-line (FEOL) structure of the integrated circuit. A first memory cell of the non-volatile memory is provided by a first memory circuit comprising the first fuse and the transistor, and a second memory cell of the non-volatile memory is provided by a second memory circuit comprising the second fuse and the transistor.


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