The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2018
Filed:
Dec. 09, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Hashem Hashemi, Folsom, CA (US);
Saurabh Sharma, El Dorado Hills, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Assignee:
INTEL CORPORATION, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/16 (2006.01); G06F 12/0842 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0842 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/1041 (2013.01);
Abstract
One embodiment provides for a memory system comprising a cache memory and a cache control circuit to receive a request to perform a partial cache line write to a first cache line of the cache memory, merge the request to perform the partial cache line write with a pending request to write to the first cache line, and process a merged request as a full cache line write.
Quick Actions:
Hashemi, Hashem. (2018). System and method for performing partial cache line writes without fill-reads or byte enables (U.S. Patent No. 10146691). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10146691
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile