The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Oct. 17, 2017
Applicant:

D3 Semiconductor Llc, Addison, TX (US);

Inventors:

Thomas E. Harrington, III, Carrollton, TX (US);

John V. Spohnheimer, Carrollton, TX (US);

Zhijun Qu, Frisco, TX (US);

Assignee:

D3 Semiconductor LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/739 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7811 (2013.01); H01L 29/0619 (2013.01); H01L 29/0634 (2013.01); H01L 29/0696 (2013.01); H01L 29/404 (2013.01); H01L 29/7395 (2013.01);
Abstract

A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures.


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