The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Jul. 31, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

En-Chiuan Liou, Tainan, TW;

Chao-Hung Lin, Changhua County, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/762 (2006.01); H01L 27/088 (2006.01); H01L 21/308 (2006.01); H01L 29/06 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823481 (2013.01); H01L 21/28123 (2013.01); H01L 21/3086 (2013.01); H01L 21/76232 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/0649 (2013.01);
Abstract

A method for fabricating a semiconductor device having a gate structure includes forming a substrate including at least two fin structures protruding from a top surface of the substrate, the substrate including a first recess and a second recess disposed under the first recess, and the first recess and the second recess being disposed between the fin structures, wherein a width of the first recess is larger than a width of the second recess, and the first recess and the second recess form a step structure; forming an insulating structure in the second recess; and forming the gate structure on the insulating structure, wherein the first recess and the second recess are filled up with the gate structure and the insulating structure.


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