The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2018

Filed:

May. 26, 2017
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Chai-Wei Fu, Chiayi, TW;

Cheng-Hsiao Lai, Chiayi County, TW;

Ying-Ting Lin, Hsinchu County, TW;

Yuan-Hui Chen, Hsinchu, TW;

Ya-Nan Mou, Hsinchu, TW;

Yung-Hsiang Lin, Hsinchu, TW;

Hsueh-Chen Cheng, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/44 (2006.01); G05F 1/46 (2006.01); G05F 1/575 (2006.01); G05F 1/56 (2006.01);
U.S. Cl.
CPC ...
G05F 1/44 (2013.01); G05F 1/465 (2013.01); G05F 1/467 (2013.01); G05F 1/468 (2013.01); G05F 1/562 (2013.01); G05F 1/575 (2013.01);
Abstract

A voltage regulating circuit provides a feedback voltage and an output voltage based on a power voltage. The voltage regulating circuit includes a reference voltage generator and a compensating circuit. The reference voltage generator receives the power voltage, produces the feedback voltage, and includes an impedance having first and second terminals. The second terminal is coupled to a ground voltage and a first current flows through the impedance at the first terminal to produce the feedback voltage. The compensating circuit includes a negative threshold voltage (NVT) transistor having a source terminal, a drain terminal and a gate terminal. The source terminal receives a power voltage, the drain terminal is connected to the gate terminal and coupled to the first terminal of the impedance through a path to add a second current to the first current when the NVT transistor is turned on under an operational condition at the FF corner.


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