The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2018

Filed:

Sep. 10, 2015
Applicant:

China Wafer Level Csp Co., Ltd., Suzhou, Jiangsu, CN;

Inventors:

Zhiqi Wang, Suzhou, CN;

Qiong Yu, Suzhou, CN;

Wei Wang, Suzhou, CN;

Assignee:

China Wafer Level CSP Co., Ltd., Suzhou, Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/08 (2006.01); H01L 23/04 (2006.01); H01L 23/498 (2006.01); H01L 23/58 (2006.01); H01L 23/29 (2006.01); G06K 9/00 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/08 (2013.01); H01L 23/04 (2013.01); H01L 23/293 (2013.01); H01L 23/49811 (2013.01); H01L 23/585 (2013.01); G06K 9/0002 (2013.01); H01L 23/3128 (2013.01); H01L 24/19 (2013.01); H01L 2924/00 (2013.01);
Abstract

A chip packaging method and package structure, the package structure including a substrate, a sensing chip coupled to the substrate, a plastic package layer located on the substrate, and a covering layer located on the plastic package layer and a first surface of the sensing chip; the sensing chip including the first surface and a second surface opposite to the first surface, and further including a sensing area located on the first surface; the second surface of the sensing chip faces towards the substrate; and the plastic package layer encloses the sensing chip, and the surface of the plastic package layer is flush with the first surface of the sensing chip.


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