The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2018
Filed:
Dec. 15, 2016
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Larry Jann, Taipei, TW;
Chih-Chien Chang, Jhuangwei Township, TW;
Po-Wen Chuang, Jhubei, TW;
Ming-I Chiu, Hsinchu, TW;
Chang-Hsi Lin, Hsinchu, TW;
Chih-Chan Li, Taichung, TW;
Yi-Ting Hu, Budai Township, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A die stacking method is provided. The die stacking method includes executing a manufacturing recipe, and loading an interposer-die mapping file according to the manufacturing recipe. The interposer-die mapping file corresponds to an interposer wafer including interposer dies. The die stacking method also includes loading a combination setting data according to the interposer-die mapping file, and loading a top die number and a top-die ID code of a top-die mapping file according to the combination setting data and the interposer-die mapping file. The top-die ID code corresponds to a top wafer including top dies, and the top die number corresponds to one of the top dies. The die stacking method also includes disposing the one of the top dies of the top wafer on one of the interposer dies of the interposer wafer.