The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Jun. 23, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Yu-Syuan Lin, Lukang Township, TW;

Jiun-Lei Jerry Yu, Zhudong Township, TW;

Ming-Cheng Lin, Yilan, TW;

Hsin-Chieh Huang, Hsin-Chu, TW;

Chao-Hsiung Wang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/00 (2006.01); H01L 23/58 (2006.01); H01L 21/78 (2006.01); H01L 29/20 (2006.01); H01L 29/40 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 23/585 (2013.01); H01L 21/78 (2013.01); H01L 29/2003 (2013.01); H01L 29/402 (2013.01); H01L 29/7786 (2013.01);
Abstract

Some embodiments relate to a die that has been formed by improved dicing techniques. The die includes a substrate which includes upper and lower substrate surfaces with a vertical substrate sidewall extending therebetween. The vertical substrate sidewall corresponds to an outermost edge of the substrate. A device layer is arranged over the upper substrate surface. A crack stop is arranged over an upper surface of the device layer and has an outer perimeter that is spaced apart laterally from the vertical substrate sidewall. The die exhibits a tapered sidewall extending downward through at least a portion of the device layer to meet the vertical substrate sidewall.


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