The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Apr. 24, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Chung-Hsun Lin, White Plains, NY (US);

Yu-Shiang Lin, Elmsford, NY (US);

Shih-Hsien Lo, Mount Kisco, NY (US);

Joel A. Silberman, Somers, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 21/3065 (2006.01); H01L 23/48 (2006.01); H01L 29/786 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/84 (2013.01); H01L 21/3065 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 27/1203 (2013.01); H01L 29/78696 (2013.01); H01L 27/1211 (2013.01); H01L 29/0673 (2013.01);
Abstract

In one aspect, a method for forming an electronic device includes the following steps. An ETSOI layer of an ETSOI wafer is patterned into one or more ETSOI segments each of the ETSOI segments having a width of from about 3 nm to about 20 nm. A gate electrode is formed over a portion of the one or more ETSOI segments which serves as a channel region of a transistor, wherein portions of the one or more ETSOI segments extending out from under the gate electrode serve as source and drain regions of the transistor. At least one TSV is formed in the ETSOI wafer adjacent to the transistor. An electronic device is also provided.


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