The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2018
Filed:
Nov. 16, 2015
Applicant:
Ultratech, Inc., San Jose, CA (US);
Inventors:
Andrew M. Hawryluk, Los, CA (US);
Serguei Anikitchev, Hayward, CA (US);
Assignee:
Ultratech, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/324 (2006.01); H01L 21/67 (2006.01); H01L 21/268 (2006.01);
U.S. Cl.
CPC ...
H01L 21/324 (2013.01); H01L 21/268 (2013.01); H01L 21/67115 (2013.01); H01L 21/67248 (2013.01);
Abstract
Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.