The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2018

Filed:

Jun. 29, 2017
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Hao Su, Singapore, SG;

Chow Yee Lim, Singapore, SG;

Chao Jiang, Singapore, SG;

Hong Liao, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 27/11521 (2017.01); H01L 29/51 (2006.01); H01L 21/28 (2006.01); H01L 21/268 (2006.01); H01L 23/528 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/2686 (2013.01); H01L 21/28273 (2013.01); H01L 23/528 (2013.01); H01L 27/11521 (2013.01); H01L 29/518 (2013.01); G11C 16/0433 (2013.01);
Abstract

A light-erasable embedded memory device and a method for manufacturing the same are provided in the present invention. The light-erasable embedded memory device includes a substrate with a memory region and a core circuit region, a floating gate on the memory region of the substrate, at least two light-absorbing films above the floating gate, wherein each light-absorbing film is provided with at least one dummy via hole overlapping the floating gate, and a dielectric layer on each light-absorbing film and filling up the dummy via holes.


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