The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

May. 09, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hung Lo, Hsinchu, TW;

Tzu-Hsiang Hsu, Hsinchu County, TW;

Chia-Jung Hsu, Changhua County, TW;

Feng-Cheng Yang, Hsinchu County, TW;

Teng-Chun Tsai, Hsinchu, TW;

Ying-Ho Chen, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/76224 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01);
Abstract

A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate, an intermediate layer disposed over the base layer and an upper layer disposed over the intermediate layer. The fin structure further includes a first protective layer and a second protective layer made of a different material than the first protective layer. The intermediate layer includes a first semiconductor layer disposed over the base layer, the first protective layer covers at least side walls of the first semiconductor layer and the second protective layer covers at least side walls of the first protective layer.


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