The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2018

Filed:

May. 11, 2016
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Guan Huei See, Singapore, SG;

Rui Tze Toh, Singapore, SG;

Shaoqiang Zhang, Singapore, SG;

Purakh Raj Verma, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/84 (2013.01); H01L 29/0649 (2013.01); H01L 29/4975 (2013.01);
Abstract

Integrated circuits and methods of producing the same are provided herein. In accordance with an exemplary embodiment, an integrated circuit includes an SOI substrate with an active layer overlying a buried insulator layer that in turn overlies a handle layer. A source is defined within the active layer, and a gate well is also defined within the active layer. A first ultra shallow trench isolation extends into the active layer, where a first portion of the active layer is positioned between the first ultra shallow trench isolation and the buried insulator layer. The first ultra shallow trench isolation is positioned between the source and the gate well.


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