The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2018

Filed:

May. 02, 2017
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Salman Akram, Boise, ID (US);

James M. Wark, Boise, ID (US);

William Mark Hiatt, Eagle, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); C23C 18/18 (2006.01); C23C 18/16 (2006.01); H01L 21/288 (2006.01); C23C 18/34 (2006.01); C23C 18/36 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76879 (2013.01); C23C 18/1607 (2013.01); C23C 18/1637 (2013.01); C23C 18/1831 (2013.01); C23C 18/1834 (2013.01); H01L 21/288 (2013.01); H01L 21/76898 (2013.01); C23C 18/34 (2013.01); C23C 18/36 (2013.01); H01L 2924/00013 (2013.01); Y10T 428/12528 (2015.01); Y10T 428/24917 (2015.01);
Abstract

A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.


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