The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Apr. 07, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Hao Wang, Hsinchu County, TW;

Wai-Yi Lien, Hsinchu, TW;

Gwan-Sin Chang, Hsinchu, TW;

Yu-Ming Lin, Taipei, TW;

Ching Hsueh, Taipei, TW;

Jia-Chuan You, Taoyuan County, TW;

Chia-Hao Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/335 (2006.01); H01L 21/8232 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 29/41791 (2013.01); H01L 29/7855 (2013.01);
Abstract

A method for manufacturing a semiconductor device, including forming a dummy gate structure on a substrate, in which the substrate has a source/drain portion and a channel portion adjacent to the source/drain region, and the dummy gate structure is formed on the channel portion of the substrate; recessing at least a part of the source/drain portion to form a recess in the source/drain portion of the substrate; forming a stress material in the recess; replacing the dummy gate structure with a gate stack; removing the stress material in the recess after the replacing the dummy gate structure with the gate stack; and forming an epitaxy structure in the recess.


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