The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2018

Filed:

Nov. 26, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Tessil Thomas, Cambridge, GB;

Phani Kumar Kandula, Bangalore, IN;

Ramamurthy Krithivas, Chandler, AZ (US);

Howard Chin, Westford, MA (US);

Ian M. Steiner, Hillsboro, OR (US);

Vivek Garg, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 1/20 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3296 (2013.01); G06F 1/206 (2013.01); G06F 1/324 (2013.01); G06F 1/3206 (2013.01); G06F 1/32 (2013.01); Y02D 10/126 (2018.01); Y02D 10/16 (2018.01); Y02D 10/172 (2018.01);
Abstract

In an embodiment, a processor includes a first chip of a multi-chip package (MCP). The first chip includes at least one core and first chip temperature control (TC) logic to assert a first power adjustment signal at a second chip of the MCP responsive to an indication that a first chip temperature of the first chip exceeds a first threshold. The processor also includes a conduit that includes a bi-directional pin to couple the first chip to the second chip within the MCP. The conduit is to transport the first power adjustment signal from the first chip to the second chip and the first power adjustment signal is to cause an adjustment of a second chip power consumption of the second chip. Other embodiments are described and claimed.


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